Term Project Results : 2005


HDL : 2005Çг⵵ ¾ß°£


HDL : Term Project ¹ßÇ¥ ³»¿ë
Á¶ Âü¿© Çлý Á¦¸ñ ÃÖÁ¾ ¹ßÇ¥ ÀÚ·á
1 ¾ÈÁ¤¿À, ¹ÚÁ¤¼® ¿Âµµ ¼¾¼­¸¦ ÀÌ¿ëÇÑ µðÁöÅÐ ¿Âµµ°è ÃÖÁ¾ º¸°í¼­
2 ÇÑÁö¿¬, Á¶¼ºÈÆ Digital Door System ÃÖÁ¾ º¸°í¼­
3 Á¤ÈÆ, ±è´öȯ, ±Ç±â¿ë, ÀÌ»ó¿í ÀüÀÚ ÀÚ¹°¼è ÃÖÁ¾ º¸°í¼­
4 À̼öÁø, ¹®Áöȯ, À±±âÁ¤, Á¶¿ë¼ö ³×¿Â »çÀÎ º¸µå ±¸Çö ÃÖÁ¾ º¸°í¼­
5 ÇãÁ¾¼ö, ±ÇÇõÀ±, ±èµ¿Çö, ±ÇÅÂÁØ ÃâÀÔ º¸¾È ½Ã½ºÅÛ ÃÖÁ¾ º¸°í¼­
6 ¹é½ÂÇö, Àå¿øÀç, ±èÁø±¹, ¼º±¤ÁÖ µðÁöÅÐ ½Ã°è ÃÖÁ¾ º¸°í¼­
7 ±èÁöÈÆ, ¹®±â¿µ, ±è±Ùȯ, ±èÀ¯±æ µµÆ® ¸ÅÆ®¸¯½º µð½ºÇ÷¹ÀÌ ÃÖÁ¾ º¸°í¼­
8 ¹Úµ¿È¯, ±èÁøÇÑ, ¹Ú»óÇö, °­¿ë±æ Á÷·Ä Åë½ÅÀ» ÀÌ¿ëÇÑ FPGA °ËÁõ ½Ã½ºÅÛ (I) ÃÖÁ¾ º¸°í¼­
9 ±¹Àº¿µ, ±è¼¼¾Æ, ÀÌÁ¤¿Ï, ¹ÚÁö¿µ(4), µµÀ¯Á¤(4) Á÷·Ä Åë½ÅÀ» ÀÌ¿ëÇÑ ¿À·ù °ËÃâ ÃÖÁ¾ º¸°í¼­
10 ±è¼º±â(4), Àå¿øÈ£(4), ·ùÁø¿µ(4), ȲÁ¤Çö(4), ¹ÚÁ¤±æ(4) Á÷·Ä Åë½ÅÀ» ÀÌ¿ëÇÑ FPGA °ËÁõ ½Ã½ºÅÛ (II) ÃÖÁ¾ º¸°í¼­
11 ¹Ú¼ºÇÑ UART¸¦ ÀÌ¿ëÇÑ E-PON ¸Á ¼³°è ÃÖÁ¾ º¸°í¼­


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Last Modified April 10, 2004 by Byeong-Yoon Choi( bychoi@deu.ac.kr)