Lecture Notes

Pong P. Chu, "Embedded SoPC Design with NIOS II Processor and Verilog Examples", Wiley, 2012

J.O. Hambeln, etc, "Rapid Prototyping of Digital Systems-SOPC Edition-", Springer, 2008,

ÃÖº´À±, Verilog HDLÀ» »ç¿ëÇÑ µðÁöÅÐ ½Ã½ºÅÛ ¼³°è ¹× ½Ç½À (IDEC °­Á ÀÚ·á)

ÀÌ°­, Àå°æ¼±, "Verilog-2001 µðÁöÅÐ ½Ã½ºÅÛ ¼³°è", È«¸ª°úÇÐ ÃâÆÇ»ç, 2009

½Å°æ¿í, "Verilog HDLÀ» »ç¿ëÇÑ µðÁöÅÐ ½Ã½ºÅÛ ¼³°è ¹× ½Ç½À ", »çÀÌÅع̵ð¾î, 2009

Cilette, "Advanced Digital Design with the Verilog HDL", PH

David J.Lilja, "Designing Digital Computer Systems with Verilog", Cambridge, 2005

• Modelsim Altera Software : download web sites

• Modelsim Xilinx Edition (MXE, XE) III : download web sites

• Altera »ç : web sites

• Xilinx : web sites

• VLSI, FPGA °ü·Ã ÁÖ¿ä web sites

• Verilog °­ÀÇ ÀÚ·á : Carnegie Mellom ´ë Thomas ±³¼ö

• È£ÁÖ : University of Queensland, Peter Sutton ±³¼ö ¿¬±¸½Ç ( FPGA ±¸Çö ¿¬±¸)

• Verilog HDL°ü·Ã °ø°³ ÀÚ·á (web site)

• Opencores IP ÀÚ·á : Term Project Âü°í ÀÚ·á (web site)

• Altera UP 1 Board ¼³°è ¿¹ (web site)

Note : Please use acroread 6.0 or newer version to print PDF file

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SOPC ¼³°è : °­ÀÇ ÀÚ·á (±³¼ö ÇнÀ Áö¿ø ¼¾ÅÍ¿¡ µî·Ï )

• µ¿ÀÇ´ëÇб³ ±³¼ö ÇнÀ Áö¿ø¼¾ÅÍ È¨ÆäÀÌÁö

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